The present invention relates generally to the field of electronic circuits and in particular to digital to analog converters.
Digital to analog converters (DACs) are well known and are used to convert digital signals representing information into analog signals representing the same information. Traditionally when converting bits of a word to an analog signal at least one resistor is needed for conversion of each bit of the word. As a result conventional current summing digital to analog converters become more and more difficult to manufacture using chip technology as the number of bits per word increases.
When designing circuits space is at a premium. As a result, the space used for digital to analog converters should be carefully controlled. In some systems, both analog and digital signals are used. In such xe2x80x9cmixed-modexe2x80x9d systems, digital to analog (D/A) and/or analog to digital (A/D) converters are used in the circuit to allow the mixed-mode system on a single chip. In addition to space requirements, other issues such as problems with wiring and routing are often found when utilizing discrete components. In addition, the cost of manufacturing units having discrete components as compared to chip technology is high. Further, the number of possible error locations also increases with discrete components as compared with a single chip. Even when employing separate chips for the D/A and the A/D converters has the drawback of requiring an interface between the chips. Some existing DACs use pulse width modulation to generate a proportional analog output. Unfortunately, these DACs often introduce a significant amount of low frequency noise into the analog signals.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for improvements in digital to analog converters.
The above mentioned problems with digital to analog converters in current chip technology and other problems are addressed by embodiments of the present invention and will be understood by reading and studying the following specification.
In one embodiment, a digital to analog converter is provided. The converter includes a multi-bit counter and a first and a second plurality of logic gates coupled to the multi-bit counter. The converter further includes a digital input selectively coupled to the first and second plurality of logic gates a first AND gate coupled to an output of the first plurality of logic gates and a second AND gate coupled to an output of the second plurality of logic gates. In addition, the converter includes a clock coupled to an input of the first and second AND gates and a filter coupled to an output of the first and second AND gates. The filter includes an output for an analog signal based on the digital input.
In another embodiment, a method of converting a multi-bit digital input signal to an analog signal is provided. The method includes receiving a digital number and converting the digital number to a series of pulses. The method further includes summing the series of pulses. The pulses in a predetermined period represent the received digital number. In addition, the method includes applying a clock signal to the sum of the series of pulses to obtain an analog signal that represents the digital number.